DM54LS502 register equivalent, 8-bit successive approximation register.
Y Y
Y
Low power Schottky version of 2502 Storage and control for successive approximation A to D conversion Performs serial-to-parallel conversion
Connection Diagram
D.
The LS502 is an 8-bit register with the interstage logic necessary to perform serial-to-parallel conversion and provide an active LOW Conversion Complete (CC) signal coincident with storage of the eighth bit An active LOW Start (S) input performs syn.
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